Today the Phenom II is officially introduced by AMD. How well is it doing compared to its predecessor and Intel's Core 2? PC Games Hardware does the test.
[Source: view picture gallery]
Two versions are entering to competition: the Phenom II X4 940 BE with 3 GHz and the 920 with 2.8 GHz. So AMD utilizes the same nomenclature as Intel does for the Core i7. But the Phenom II won't compete with the Nehalem CPUs, regardless of the similar names, because the Intel processors are aiming for a different market sector. Therefore AMD's new generation will mainly be compared to the Core 2 Quads (Yorkfield) until Intel introduces the Havendale and Lynnfield architectures to the mass market (possibly under the name Core i5).
| Prozessor | Codename | Number of cores | Clock (GHz) | L2-Cache | L3-Cache | TDP |
|---|
| Phenom II X4 940 BE | Deneb | 4 | 3 | 2 MiByte | 6 MiByte | 125 W |
|---|
| Phenom II X4 920 | Deneb | 4 | 2,8 | 2 MiByte | 6 MiByte | 125 W |
|---|
| Phenom X4 9950 BE | Agena | 4 | 2,6 | 2 MiByte | 2 MiByte | 125/140 W |
|---|
Phenom II X4 940 BE [Source: view picture gallery]
Contrary to the first Phenom X4, codename "Agena”, the "Deneb” is produced in a 45 nanometer structure. Thus lower energy consumption and higher clock speeds should be possible. The first Phenom suffered from low core frequencies, but its successor comes with 3 GHz ex factory - so it is running about 400 MHz faster than the top model of the Agena series, the 9950 BE with 2.6 GHz. And this won't be all: the 45 nanometer structure provides the newcomer with unexpected clock speed resources as several overclocking tests revealed.
The level 2 cache is kept at 512 KiByte per CPU core (all in all 2,048 KiByte) and thus is twice as big as its equivalent of Intel's Core i7 series. Both additionally have level 3 cache which is used by all cores. For the Phenom II AMD increases this cache from 2 to 6 MiByte - the L3 cache of the Core i7 is even bigger and offers 8 MiByte, but contrary to the Phenom II version it always contains the data of the L1 and L2 while the L3 cache of the AMD CPU is mostly working without the doubled data storage. Thus some accesses need more time to be handled, but the available overall capacity is bigger.
AMD also increased the so called IPC rate (Instructions per Second), which stands for the number of operations per cycle. According to AMD this enhanced efficiency alone is supposed to deliver a performance benefit of about 5 percent. If the chip is not stressed on the other hand it requires less power than before - energy efficiency has been among the top priorities during development.
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